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DLA - SMD-5962-96810

MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 28 February 1996
Status: inactive
Page Count: 18
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 54LVT16373 3.3-volt 16-bit transparent D-type latch with three-state outputs, TTL compatible inputs

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certificaton to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X GDFP1-F48 48 Flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (VCC) ...................................... −0.5 V dc to +4.6 V dc DC input voltage range (VIN) ................................... −0.5 V dc to +7.0 V dc 4/ DC output voltage range applied to any output in the high state or power-off state (VOUT) ...................................... −0.5 V dc to +7.0 V dc 4/ DC output current (IOL) (per output) ............................ +96 mA DC output current (IOH) (per output) ............................ +48 mA 5/ DC input clamp current (IIK) (VIN < 0.0 V) ...................... −50 mA DC output clamp current (IIK) (VIN < 0.0 V) ..................... −50 mA Maximum power dissipation (PD) .................................. 440 mW 6/ Storage temperature range (TSTG) ................................ −65°C to +150°C Lead temperature (soldering, 10 seconds) ........................ +300°C Thermal resistance, junction-to-case (ΘJC) ...................... See MIL-STD-1835 Junction temperature (TJ) ....................................... +175°C

Supply voltage range (VCC) ...................................... +2.7 V dc to +3.6 V dc Input voltage range (VIN) ....................................... 0.0 V dc to +5.5 V dc Output voltage range (VOUT) ..................................... 0.0 V dc to +5.5 V dc Minimum high level input voltage (VIH) .......................... +2.0 V Maximum low level input voltage (VIL) ........................... +0.8 V Maximum high level output current (IOH) ......................... −24 mA Maximum low level output current (IOL) .......................... +48 mA Maximum input rise or fall rate (outputs enabled) (Δt/Δt) ....... 10 ns/V Case operating temperature range (TC) ........................... −55°C to + 125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ................... XX percent 7/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

April 15, 2021
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes...
December 22, 2014
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
October 20, 2008
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
April 20, 1998
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by...
April 24, 1997
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-96810
February 28, 1996
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-VOLT 16-BIT TRANSPARENT D-TYPE LATCH WITH BUS HOLD, THREE-STATE OUTPUTS, AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...

References

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