DLA - DESC-DWG-85078
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
inactive
| Organization: | DLA |
| Publication Date: | 6 November 1985 |
| Status: | inactive |
| Page Count: | 9 |
Document History
January 10, 2014
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
Devices conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM...
June 23, 2008
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
Devices conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM...
October 2, 1992
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
This drawing describes the requirements for a family of programmable 3 bit, 16 pin compatible, emitter-coupled logic (ECL) delay lines.
The complete PIN shall be as shown in the following example:
August 5, 1988
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
A description is not available for this item.
November 10, 1987
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
A description is not available for this item.
DESC-DWG-85078
November 6, 1985
DELAY LINES, ACTIVE, PROGRAMMABLE 3 BIT, 16 PIN DIP COMPATIBLE, EMITTER-COUPLED LOGIC (ECL)
A description is not available for this item.