DLA - SMD-5962-88683 REV A
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 8K X 9 SRAM, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 25 August 1997 |
| Status: | inactive |
| Page Count: | 19 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
The complete PIN is as shown in the following example:
The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function Acess time 01 (See 6.4) 8192 × 9 CMOS static RAM 45 NS 02 (See 6.4) 8192 × 9 CMOS static RAM 35 NS 03 (See 6.4) 8192 × 9 CMOS static RAM 25 NS 04 (See 6.4) 8192 × 9 CMOS static RAM 45 NS 05 (See 6.4) 8192 × 9 CMOS static RAM 35 NS 06 (See 6.4) 8192 × 9 CMOS static RAM 25 NS
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style U CQCC3-N28 28 rectangular chip carrier package X GDIP1-T28 or CDIP2-T28 28 dual-in-line package Y See figure 1 28 dual-in-line package Z GDFP2-F28 28 flat package
The lead finish is as specified in MIL-PRF-38535, appendix A.
Supply voltage to ground potential ---------------- −0.5 V dc to +7.0 V dc
DC voltage applied to outputs --------------------
Supply voltage (VCC) --------------------
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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