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DLA - SMD-5962-87514 REV C

MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 6 April 1997
Status: inactive
Page Count: 28
scope:

This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.

The complete PIN shall be as shown in the following example:

The device type(s) shall identify the circuit function as follows:

Generic Access Write Write End of write Device type number Circuit function time speed mode indicator Endurance 01 (see 6.4) (8K × 8 EEPROM) 350 ns 10 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 02 300 ns 10 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 03 250 ns 10 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 04 200 ns 10 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 05 250 ns 10 ms byte/page [D bar][A bar][T bar][A bar] polling 100,000 cycles 06 350 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 07 300 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 08 250 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 09 200 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 10 120 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 11 90 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 12 70 ns 2 ms byte/page [D bar][A bar][T bar][A bar] polling 10,000 cycles 13 350 ns 1 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 14 300 ns 1 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 15 250 ns 1 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 16 200 ns 1 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 17 150 ns 1 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 18 350 ns 1 ms byte [D bar][A bar][T bar][A bar] polling 10,000 cycles 19 300 ns 1 ms byte [D bar][A bar][T bar][A bar] polling 10,000 cycles 20 250 ns 1 ms byte [D bar][A bar][T bar][A bar] polling 10,000 cycles 21 200 ns 1 ms byte [D bar][A bar][T bar][A bar] polling 10,000 cycles 22 150 ns 1 ms byte [D bar][A bar][T bar][A bar] polling 10,000 cycles 23 350 ns 10 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 24 300 ns 10 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 25 250 ns 10 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 26 200 ns 10 ms byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles 27 250 ns 10 ms byte RDY/[B bar][U bar][S bar][Y bar] 100,000 cycles 28 200 ns 200 µs byte RDY/[B bar][U bar][S bar][Y bar] 10,000 cycles

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style U See figure 1 32 "J" leaded cerquad package X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y CQCC1-N32 32 Rectangular leadless chip carrier Z CDFP4-F28 28 Flat pack

Supply voltage range (VCC) ................................... −0.3 V dc to +6.25 V dc Storage temperature range .................................... −65°C to + 150°C Maximum power dissipation (PD) ............................... 1.0 W Lead temperature (soldering, 10 seconds) ..................... +300°C Junction temperature (TJ) 2/ ................................. +175°C Thermal resistance, junction-to-case (ΘJC) ................... See MIL-STD-1835 Input voltage range (VIL, VIH) ............................... −0.3 V dc to +6.25 V dc Data retention ............................................... 10 years (minimum) Endurance: Device types 01 through 04, 06 through 26, and 28 ........... 10,000 cycles/byte (minimum) Device types 05 and 27 ...................................... 100,000 cycles/byte (minimum) Chip clear voltage (VH) ...................................... 13.0 V dc

Supply voltage range (VCC) ................................... +4.5 V dc to +5.5 V dc Case operating temperature range (TC) ........................ −55°C to +125°C Input voltage, low range (VIL) ............................... −0.1 V dc to +0.8 V dc Input voltage, high range (VIH) .............................. +2.0 V dc to VCC +0.3 V dc Chip clear voltage range (VH) ................................ 12 V dc to 13 V dc

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Document History

July 20, 2017
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
March 25, 2010
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
June 4, 2004
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
A description is not available for this item.
August 12, 1997
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-87514 REV C
April 6, 1997
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. The complete PIN shall be as shown in the...
January 5, 1993
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices"....
August 7, 1989
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
A description is not available for this item.
July 1, 1988
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
A description is not available for this item.

References

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