DLA - SMD-5962-88665 REV D
MICROCIRCUITS, MEMORY, DIGITAL, CMOS 2K X 16 DUAL PORT SRAM, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 9 December 1996 |
| Status: | inactive |
| Page Count: | 27 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
The complete PIN is as shown in the following example:
The device type(s) identify the circuit function as follows:
Device Type Generic number 1/ Circuit function Access time 01,07 2K × 16 dual port CMOS SRAM (master) 90 ns 02,08 2K × 16 dual port CMOS SRAM (slave) 90 ns 03,09 2K × 16 dual port CMOS SRAM (master) 70 ns 04,10 2K × 16 dual port CMOS SRAM (slave) 70 ns 05,11 2K × 16 dual port CMOS SRAM (master) 55 ns 06,12 2K × 16 dual port CMOS SRAM (slave) 55 ns 13 2K × 16 dual port CMOS SRAM (master) 45 ns 14 2K × 16 dual port CMOS SRAM (slave) 45 ns 15 2K × 16 dual port CMOS SRAM (master) 35 ns 16 2K × 16 dual port CMOS SRAM (slave) 35 ns
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X See figure 1 68 dual-in-line Y CQCC1-N68 68 square leadless chip carrier Z CMGA3-PN 68 pin grid array 2/ U See figure 1 68 flat pack
The lead finish is as specified in MIL-PRF-38535, appendix A.
Supply voltage range ....................
Supply voltage range (VCC) ....................
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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