scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54BCT8373A Scan test device with octal D-type latch, three-state outputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835, and as follows:

Outline letter Descriptive designator Terminals Package style L GD1P3-T24 or CDIP4-T24 24 Dual-in-line 5 CQCC1-N28 28 Leadless chip carrier

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (V_CC) - - - - - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage range (except TMS) (V_IN) - - - - - - - - - - - - - - - −0.5 V dc to +7.0 0 V dc 4/ DC input voltage range (TMS) (V_IN) - - - - - - - - - - - - - - - - - - −0.5 V dc to +12.0 V dc 4/ DC output voltage range applied to any output in the disabled or power-off state (V_OUT) - - - - - - - - - - - - - - - −0.5 V dc to +5.5 V dc DC output voltage range applied to any output in the high state (V_OUT) - - - - - - - - - - - - - - - - - - - - - - - - −0.5 V dc to V_CC DC input clamp current (I_IK) - - - - - - - - - - - - - - - - - - - - - −30 mA DC output current into any output in the low state (I_OL) (per output): TDO - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +40 mA Any Q - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +96 mA Storage temperature range (T_STG) - - - - - - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - - - - - - - - - - - - - +300°C Thermal resistance, junction-to-case (Θ_JC) - - - - - - - - - - - - - - See MIL-STD-1835 Junction temperature (T_J) - - - - - - - - - - - - - - - - - - - - - - - +175°C Maximum power dissipation (P_D) - - - - - - - - - - - - - - - - - - - - 497 mW/ 5/

Supply voltage range (V_CC) - - - - - - - - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Maximum low level input voltage (V_IL) - - - - - - - - - - - - - - - - - 0.8 V Minimum high level input voltage (V_IH) - - - - - - - - - - - - - - - - 2.0 V Double high level input voltage (TMS) (V_IHH) - - - - - - - - - - - - - +10.0 V dc minimum to +12.0 V maximum Maximum input clamp current (I_IK) - - - - - - - - - - - - - - - - - - - −18 mA Maximum high level output current (I_OH): TDO - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - −3 mA Any Q - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - −12 mA Maximum low level output current (I_OL): TDO - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20 mA Any Q - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 48 mA Minimum setup time (t_s): Data before LE↓ - - - - - - - - - - - - - - - - - - - - - - - - - - - 3.0 ns Any D before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 6.0 ns LE or [O bar][E bar] before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - 6.0 ns TDI before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 6.0 ns TMS before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 12.0 ns Minimum hold time (t_h): Data after LE↓ - - - - - - - - - - - - - - - - - - - - - - - - - - - 2.0 ns Any D after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 4.5 ns LE or [O bar][E bar] after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - 4.5 ns TDI after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 4.5 ns TMS after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.0 ns Minimum pulse width (t_w): LE high - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 5.0 ns TCK high or low - - - - - - - - - - - - - - - - - - - - - - - - - - - 25.0 ns TMS double high - - - - - - - - - - - - - - - - - - - - - - - - - - - 50.0 ns 6/ Minimum delay time, power-up to TCK↑ (t_d) - - - - - - - - - - - - - - - 100.0 ns 6/ Maximum TCK frequency (f_CLK) - - - - - - - - - - - - - - - - - - - - - 20 MHz Case operating temperature range (T_C) - - - - - - - - - - - - - - - - - −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - - - - - - - XX percent 1/

intended Use: