DLA - SMD-5962-94558 REV A
MICROCIRCUIT, DIGITAL, 32-BIT ALU/16-BIT BUS, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 15 March 1996 |
| Status: | inactive |
| Page Count: | 45 |
scope:
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment (device class M). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class M, the user is cautioned to assure that the device is appropriate for the application environment.
The PIN is as shown in the following example:
Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function 01 320C50A Digital signal processor, 40 MHz 02 320C50A Digital signal processor, 50 MHz 03 320C50 Digital signal processor, 50 MHz 04 320C50 Digital signal processor, 66 MHz
The device class designator is a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A N Certification and qualification to MIL-PRF-38535 with a nontraditional performance environment 1/ Q or V Certification and qualification to MIL-PRF-38535
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X CMGA2-P141 141 Ceramic pin grid array Y See figure 1 132 Ceramic quad flat package with non-conductive tiebar Z See figure 1 132 Plastic quad flat package
The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix A for device class M.
Supply voltage range (VDD) 3/ . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc DC input voltage range (VIN) . . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc DC output voltage range (VOUT) . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc Storage temperature range (TSTG) . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . +300°C Thermal resistance, junction-to-case (ΘJC) Case X . . . . 4.8°C/W Thermal resistance, junction-to-case (ΘJC) Case Y . . . . 2.6°C/W Thermal resistance, junction-to-case (ΘJC) Case Z . . . . 10°C/W Thermal resistance, junction-to-ambient (ΘJA) Case X . . . 39.0°C/W Thermal resistance, junction-to-ambient (ΘJA) Case Y . . . 55.7°C/W Thermal resistance, junction-to-ambient (ΘJA) Case Z . . . 49.0°C/W Maximum power dissipation (PD) TA = 25°C, VDD = Max: Device 01 . . . . . . . . . . . . . . . . . . . . . . . . 1 W Device 02 . . . . . . . . . . . . . . . . . . . . . . . . 1.375 W Device 03, 04 . . . . . . . . . . . . . . . . . . . . . . 0.9 W Junction temperature (TJ) . . . . . . . . . . . . . . . . +175°C
Supply voltage range (VDD): Devices 01 and 02 . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Devices 03 and 04 . . . . . . . . . . . . . . . . . . . +4.75 V dc to +5.25 V dc Supply voltage (VSS) . . . . . . . . . . . . . . . . . . . +0.0 V dc High level input voltage range (VIH) CLKIN, CLKIN2 . . . . . . . . . . . . . . . . . . . . . +3.0 V dc to VDD +0.3 V dc CLKX, CLKR, TCLKX, TCLKR . . . . . . . . . . . . . . . +2.5 V dc to VDD +0.3 V dc All others . . . . . . . . . . . . . . . . . . . . . . +2.2 V dc to VDD +0.3 V dc Low level input voltage range (VIL) . . . . . . . . . . . −0.3 V dc to 0.6 V dc Maximum high level output current (IOH) . . . . . . . . . −300 µA Maximum low level output current (IOL) . . . . . . . . . . +2 mA Input clock frequency range (Device 01) 4/ . . . . . . . . 0 MHz to 40 MHz (Device 02) 4/ . . . . . . . . 0 MHz to 50 MHz (Device 03) 4/ . . . . . . . . 0 MHz to 50 MHz (Device 04) 4/ . . . . . . . . 0 MHz to 60 MHz Internal clock option capacitors C1, C2 . . . . . . . . . . 10 pF Case operating temperature range (TC) . . . . . . . . . . −55°C ≤ TC ≤ +125°C Minimum free-air operating temperature (TA) . . . . . . . −55°C
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . . . . . . . XX percent 5/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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