DLA - SMD-5962-88681 REV C
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 64K X 4 SRAM, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 19 August 1997 |
| Status: | inactive |
| Page Count: | 17 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
The complete PIN is as shown in the following example:
The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function Access time 01 (See 6.6) 64K × 4 CMOS SRAM 35 ns 02 (See 6.6) 64K × 4 CMOS SRAM 45 ns 03 (See 6.6) 64K × 4 CMOS SRAM 55 ns 04 (See 6.6) 64K × 4 CMOS SRAM 70 ns 05 (See 6.6) 64K × 4 CMOS SRAM 25 ns 06 (See 6.6) 64K × 4 CMOS SRAM 20 ns
The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 dual-in-line package X CQCC3-N28 28 rectangular chip carrier package Y CDFP4-28 28 flat package
The lead finish is as specified in MIL-PRF-38535, appendix A.
Voltage on any input relative to VSS range --------- −0.5 V dc to +7.0 V dc
Voltage applied to outputs range --------------------
Supply voltage range (VCC) --------------------
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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