DLA - SMD-5962-92132 REV A
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 64K X 4 DRAM, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 6 September 1994 |
| Status: | inactive |
| Page Count: | 32 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Access Device type Generic number Circuit function time Refresh 01 4C4067 64K × 4 bit DRAM 100 ns 256 cycles (4 ms) 02 4C4067 64K × 4 bit DRAM 120 ns 256 cycles (4 ms) 03 4C4067 64K × 4 bit DRAM 150 ns 256 cycles (4 ms)
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style V GDIP1-T18 18 Dual-in-line X See figure 1 18 Leadless chip carrier Y See figure 1 18 Leadless chip carrier
The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Voltage on any pin relative to VSS - - - - - - - - - - - - −1.5 V to +7.0 V Short-circuit output current - - - - - - - - - - - - - - - - 50 mA Power dissipation (PD) - - - - - - - - - - - - - - - - - - 1.0 W Storage temperature range - - - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 5 seconds) - - - - - - - - - +300°C Thermal resistance (θJC): Case V - - - - - - - - - - - - - - - - - - - - - - - - - See MIL-STD-1835 Cases X and Y - - - - - - - - - - - - - - - - - - - - - - 50°C/W Junction temperature (TJ) - - - - - - - - - - - - - - - - - +150°C
Supply voltage (VCC) - - - - - - - - - - - - - - - - - - - - 4.5 V dc to 5.5 V dc Power supply and signal reference (VSS) - - - - - - - - - - 0.0 V dc High level input voltage (VIH) - - - - - - - - - - - - - - - 2.4 V dc to 6.5 V dc Low level input voltage (VIL) - - - - - - - - - - - - - - - −1.0 V dc to +0.8 V dc Case operating temperature (TC) - - - - - - - - - - - - - - −55°C to +125°C Refresh cycle time - - - - - - - - - - - - - - - - - - - - 4.0 ms
Fault coverage measurement of manufacturing Logic tests (MIL-STD-883, test method 5012) . . . . . . 2/ percent
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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