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NPFC - MIL-M-38510/30

MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON

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Organization: NPFC
Publication Date: 27 December 1974
Status: inactive
Page Count: 29
scope:

This specification covers the detail requirements for monolithic silicon, DTL, positive logic NAND gating microcircuits. Three product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510.

The device type shall be as follows:

Device type Circuit 01 Dual, 4-input expandable NAND gate 02 Extendable hex inverter 03 Hex inverter 04 Quadruple, 2-input positive NAND gate 05 Triple, 3-input positive NAND gate

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Letter Case outline, MIL-M-38510, appendix C A F-1 (14-lead, ¼" × ¼", flat-pack) B F-3 (14-lead, ⅛" × ¼", flat-pack) C D-1 (14-lead, ¼" × ¾", dual-in-line pack) D F-2 (14-lead, ¼" × ⅜", flat-pack)

Supply voltage range- - - - - - - - - - - −0 5 Vdc to 8.0 Vdc Input voltage range - - - - - - - - - - - −1.5 Vdc to 5.5 Vdc Storage temperature range - - - - - - - - −65°C to 150°C Maximum power dissipation, PD - - - - - - 23 mWdc per gate Lead temperature (soldering 10 seconds) - 300°C Junction temperature- - - - - - - - - - - - TJ = 175°C

Supply voltage - - - - - - - - - - - - - - 4.5 Vdc minimum to 5.5 Vdc maximum Minimum high level input voltage - - - - - 1.9 Vdc @ 25°C Maximum low level input voltage- - - - - - 1.1 Vdc @ 25°C Normalized fanout (each output)- - - - - - 8 maximum Ambient operating temperature range- - - - −55°C to 125°C

intended Use:

Microcircuits conforming to this specification are intended for use for Government microcircuit applications (original equipment) and logistic purposes.

Document History

Microcircuits, Digital, DTL, NAND Gates Monolithic Silicon
A description is not available for this item.
June 3, 2013
Microcircuits, Digital, DTL, NAND Gates Monolithic Silicon
A description is not available for this item.
August 22, 2008
MICROCIRCUITS, DIGITAL, DTL, NAND GATES MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, DTL, positive logic NAND gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes...
May 3, 2005
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, DTL, positive logic NAND gating microcircuits. Two product assurance classes and a choice of case outlines and lead finishes...
June 28, 2002
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
October 6, 1995
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
July 19, 1976
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/30
December 27, 1974
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, DTL, positive logic NAND gating microcircuits. Three product assurance classes and a choice of case outline/lead finish are...
December 21, 1972
MICROCIRCUITS, DIGITAL, DTL, NAND GATES, MONOLITHIC SILICON
A description is not available for this item.

References

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