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DLA - SMD-5962-95823 REV A

MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS/SOS, 8K X 8 STATIC RAM, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 18 September 1997
Status: inactive
Page Count: 20
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device types shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time 01 65647RH 8K × 8 Radiation hardened CMOS/SOS SRAM 50 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non- JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38635

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CDIP2-T28 28 Dual-in-line package Y CDFP3-F28 28 Flat pack

The lead finish is as specified in MIL-PRF-38635 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range .................................... −0.5 V to +7.0 V dc Input, output, or I/O voltage ........................... −0.3 V dc to VDD +0.3 V dc Maximum package power dissipation (PD) at TA = +125°C Case X ................................................ 1.11 W 3/ Case Y ................................................ 0.94 W 3/ Lead temperature (soldering, 10 seconds maximum) ........ +300°C Thermal resistance, junction-to-case (ΘJC): Case X ................................................ 8.0°C/W Case Y ................................................ 7.4°C/W Thermal resistance, junction-to-amibientJA) Case X ................................................ 45.0°C/W Case Y ................................................ 53.4°C/W Junction temperature (TJ) ............................... +175°C Storage temperature range ............................... −65°C to +150°C

Supply voltage (VDD) .................................... +4.5 V dc to +5.5 V dc Ground voltage (GND) .................................... 0.0 V dc Input high voltage (VIH) ................................ 0.8VDD to VDD Input Low voltage (VIL) ................................. 0.0 V dc to 0.2VDD Case operating temperature range (TC) ................... −55°C to +125°C Input rise and fall time ................................ 40 ns max Radiation features: Total dose irradiation ................................ ≥ 300 KRads(Si) Dose rate upset (20 ns pulse) ......................... ≥ 1 × 1011 Rads(Si)/sec 4/ Dose rate survivability ............................... ≥ 1 × 1012 Rads(Si)/sec 4/ Single event phenomenon (SEP) effective linear energy threshold (LET) with no upsets ....................... ≥ 100 MeV/(cm2/mg) 4/ Latchup ............................................... None 4/ Cosmic ray upset immunity ............................. > 1 × 10−10 errors/bit-day 4/ 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

April 24, 2017
MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOS, RADIATION HARDENED, 8K X 8 STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
July 5, 2009
MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOS, RADIATION HARDENED, 8K X 8 STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-95823 REV A
September 18, 1997
MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS/SOS, 8K X 8 STATIC RAM, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
March 20, 1996
MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS/SOS, 8K X 8 STATIC RAM, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...

References

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