scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices." When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device types shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time 01 65647RH 8K × 8 Radiation hardened CMOS/SOS SRAM 50 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CDIP2-T28 28 Dual-in-line package Y CDFP3-F28 28 Flat pack

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-PRF-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range . . . . . . . . . . . . . . . . . . −0.5 V to +7.0 V dc Input, output, or I/O voltage . . . . . . . . . . . . . . −0.3 V dc to V_DD +0.3 V dc Maximum package power dissipation (P_D) at T_A = +125°C Case X . . . . . . . . . . . . . . . . . . . . . . . . 1.11 W 3/ Case Y . . . . . . . . . . . . . . . . . . . . . . . . 0.94 W 3/ Lead temperature (soldering, 10 seconds maximum) . . . . +300°C Thermal resistance, junction-to-case (Θ_JC): Case X . . . . . . . . . . . . . . . . . . . . . . . . 8.0°C/W Case Y . . . . . . . . . . . . . . . . . . . . . . . . 7.4°C/W Thermal resistance, junction-to-ambient (Θ_JA): Case X . . . . . . . . . . . . . . . . . . . . . . . . 45.0°C/W Case Y . . . . . . . . . . . . . . . . . . . . . . . . 53.4°C/W Junction temperature (T_J) . . . . . . . . . . . . . . . . +175°C Storage temperature range . . . . . . . . . . . . . . . . −65°C to +150°C

Supply Voltage (V_DD) . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Ground voltage (GND) . . . . . . . . . . . . . . . . . . 0.0 V dc Input high voltage (V_IH) . . . . . . . . . . . . . . . . 0.8V_DD to V_DD Input Low voltage (V_IL) . . . . . . . . . . . . . . . . . 0.0 V dc to 0.2V_DD Case operating temperature range (T_C) . . . . . . . . . . −55°C to +125°C Input rise and fall time . . . . . . . . . . . . . . . . 40 ns max Radiation features: Total dose irradiation . . . . . . . . . . . . . . . . ≥ 300 KRads(Si) Dose rate upset (20 ns pulse) . . . . . . . . . . . . . ≥ 1 × 10¹¹ Rads(Si)/sec 4/ Dose rate survivability . . . . . . . . . . . . . . . . ≥ 1 × 10¹² Rads(Si)/sec 4/ Single event phenomenon (SEP) effective linear energy threshold (LET) with no upsets . . . . ≥ 100 MeV/(cm²/mg) 4/ Latchup . . . . . . . . . . . . . . . . . . . . . . . . None 4/ Cosmic ray upset immunity . . . . . . . . . . . . . . . < 1 × 10⁻¹⁰ errors/bit-day 4/ 5/

intended Use: