UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

DLA - SMD-5962-93187 REV A

MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT

inactive
Organization: DLA
Publication Date: 7 July 1995
Status: inactive
Page Count: 24
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with MIL-H-38534. Two product assurance classes, military high reliability (device class H) and space application (device class K) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes H and K RHA marked devices shall meet the MIL-H-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 WS-128K32-120HQ SRAM, 128K X 32-bit 120 ns 02 WS-128K32-100HQ SRAM, 128K X 32-bit 100 ns 03 WS-128K32-85HQ SRAM, 128K X 32-bit 85 ns 04 WS-128K32-70HQ SRAM, 128K X 32-bit 70 ns 05 WS-128K32-55HQ SRAM, 128K X 32-bit 55 ns 06 WS-128K32-45HQ SRAM, 128K X 32-bit 45 ns 07 WS-128K32-35HQ SRAM, 128K X 32-bit 35 ns 08 WS-128K32-25HQ SRAM, 128K X 32-bit 25 ns 09 WS-128K32-20HQ SRAM, 128K X 32-bit 20 ns 10 WS-128K32-17HQ SRAM, 128K X 32-bit 17 ns

This device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation H or K Certification and qualification to MIL-M-38534

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style T See figure 1 66 Hex-in-line, single cavity, with standoffs U See figure 1 66 Hex-in-line, single cavity, without standoffs U See figure 1 66 Hex-in-line, single cavity, with standoffs Y See figure 1 66 Hex-in-line, single cavity, without standoffs

The lead finish shall be as specified in MIL-H-38534 for classes N and K. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) ........................ −0.5 V dc to +7.0 V dc Signal voltage range (any pin) .................... −0.5 V dc to +7.0 V dc Power dissipation (PD): Device types 01 through 08 ...................... 2.2 W Device type 09 and 10 ........................... 4.4 W Thermal resistance junction-to-case (θJC) ......... 6.6°C/W Storage temperature range ......................... −65°C to +150°C Lead temperature (soldering, 10 seconds) .......... +300°C

Supply voltage range (VCC) ........................ +4.5 V dc to +5.5 V dc Input low voltage range (VIL) ..................... −0.5 V dc to +0.8 V dc Input high voltage range (VIH) .................... +2.2 V dc to VCC +0.3 V dc Output low voltage, maximum (VOL) ................. +0.4 V dc Output high voltage, minimum (VOH) ................ +2.4 V dc Case operating temperature range (TC) ............. −55°C to +125°C

Document History

November 13, 2023
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
A description is not available for this item.
August 8, 2019
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
January 23, 2018
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
April 16, 2007
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
November 13, 2001
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
November 14, 2000
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
February 7, 2000
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
August 27, 1999
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
July 13, 1998
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
April 6, 1998
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
September 8, 1997
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
November 20, 1996
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
October 18, 1995
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
SMD-5962-93187 REV A
July 7, 1995
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
June 24, 1994
MICROCIRCUIT, HYBRID, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
Advertisement