DLA - SMD-5962-94758
MICROCIRCUIT, DIGITAL, SERIAL MICROCODED MULTI-MODE INTELLIGENT TERMINAL, SILICON
| Organization: | DLA |
| Publication Date: | 28 March 1995 |
| Status: | inactive |
| Page Count: | 48 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function 01 69151XT15 Serial microcoded monolithic multi-mode intelligent terminal with +5 V/−15 V operation 02 69151XT5 Serial microcoded monolithic multi-mode intelligent terminal with +5 V operation 03 69151XT12 Serial microcoded monolithic multi-mode intelligent terminal with +5 V/−12 V operation
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X See figure 1 139 Pin grid array Y See figure 1 140 Quad flat package
The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Operating case temperature range (TC) . . . . . . . . . . . . . . . . . . . . . . . −55°C to +125°C Lead temperature (soldering, 5 seconds) (TS) . . . . . . . . . . . . . . . . . . . . +300°C Transceiver supply voltage (VEE): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −22 V dc Transceiver supply voltage range (VCC): Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc Logic supply voltage range (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc Receiver common mode input voltage range (VIC): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −11 V dc to +11 V dc Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −5 V dc to +5 V dc Logic input current (II) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Latch-up immunity (ILU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA Peak output current transmitter (IO): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 mA Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mA Logic voltage on any pin range (VI/O). . . . . . . . . . . . . . . . . . . . . . . . −0.3 V dc to VDD + 0.3 V dc Input voltage range receiver (VDR): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 VP, L-L Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 VP, L-L Thermal resistance, junction-to-case (ΘJC) 2/ . . . . . . . . . . . . . . . . . . . 7.0°C/W Storage temperature range (TSTG) . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Maximum power dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 W Junction temperature (TJ): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +135°C
Case operating temperature range (TC) . . . . . . . . . . . . . . . . . . . . . . . −55°C to +125°C Supply voltage range (VDD) . . . . . . . . . . . . . . . . . . .. . . . . . . . . . 4.5 V dc to 5.5 V dc Transceiver supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . 4.75 V dc to 5.25 V dc Transceiver supply voltage (VEE): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −12 or −15 (±5%) V dc Receiver differential voltage (VDR): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 VP-P Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0 VP-P Logic dc input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD V dc Receiver common mode input voltage range (VIC): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 V dc Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5.0 V dc Driver peak output current (IO): Devices 01, 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 mA Device 02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700 mA Serial data rate range (SD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 1 MHz Clock duty cycle (DC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ± 5% Operating frequency (FIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ± .01% MHz
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012). . . . . . . . . . . . . . . . . . . . . 3/ percent
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