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BSI - BS EN 60191-6

Mechanical standardization of semiconductor devices Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

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Organization: BSI
Publication Date: 18 February 2005
Status: inactive
Page Count: 42
ICS Code (Semiconductor devices in general): 31.080.01

Document History

BS EN 60191-6
April 30, 2010
Mechanical standardization of semiconductor devices Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
A description is not available for this item.
BS EN 60191-6
February 18, 2005
Mechanical standardization of semiconductor devices Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
A description is not available for this item.

References

This document references:
IEC 60191-3 - Mechanical Standardization of Semiconductor Devices - Part 3: General Rules for the Preparation of Outline Drawings of Integrated Circuits
Published by IEC on October 1, 1999
A description is not available for this item.
This document references:
IEC 60191-1 - Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
Published by IEC on January 1, 2018
This part of IEC 60191 gives guidelines on the preparation of outline drawings of discrete devices, including discrete surface-mounted semiconductor devices with lead count less than 8. For the...
This document references:
IEC 60191-4 - Mechanical Standardization of Semiconductor Devices - Part 4: Coding System and Classification into Forms of Package Outlines for Semiconductor Device Packages
Published by IEC on March 1, 2018
This part of IEC 60191 specifies a method for the designation of package outlines and for the classification of forms of package outlines for semiconductor devices and a systematic method for...
This document references:
BS EN ISO 1101 - Geometrical Product Specifications (GPS) — Geometrical tolerancing — Tolerances of form, orientation, location and run-out
Published by BSI on February 28, 2017
A description is not available for this item.
This document references:
EN 60191-3 - Mechanical Standardization of Semiconductor Devices Part 3: General Rules for the Preparation of Outline Drawings of Integrated Circuits
Published by CENELEC on November 1, 1999
A description is not available for this item.
This document references:
EN 60191-4 - Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
Published by CENELEC on March 1, 2014
This part of IEC 60191 specifies a method for the designation of package outlines and for the classification of forms of package outlines for semiconductor devices and a systematic method for...
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