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DLA - SMD-5962-94712

MICROCIRCUIT, MEMORY, DIGITAL CMOS, PROGRAMMABLE LOGIC CELL ARRAY, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 18 October 1994
Status: inactive
Page Count: 35
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (−) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 4003A-10 3000 gate programmable array 10 ns 02 4003A-6 3000 gate programmable array 6 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CMGA5-P120 120 Pin grid array package Y See figure 1 100 Quad flat package Z See figure 1 100 Quad flat package

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range to ground potential (VCC) . . . . −0.5 V dc to +7.0 V dc DC input voltage range (VIN) . . . . . . . . . . . . . −0.5 V dc to VCC + 5.0 V dc Voltage applied to three-state output (VIS). . . . . . −0.5 V dc to VCC + 5.0 V dc Thermal resistance, junction-to-case (θJC) . . . . . . See MIL-STD-1835 Thermal resistance, junction-to-ambient (θJA). . . . . +50°C/W Power dissipation (PD) . . . . . . . . . . . . . . . . 500 mW Junction temperature (TJ) . . . . . . . . . . . . . . +150°C 3/ Lead temperature (soldering, 10 seconds) . . . . . . . +260°C Storage temperature range - - - - - - - - - - - - - - - −65°C to +150°C

Supply voltage relative to ground (VCC) . . . . . . . . +4.5 V dc minimum to +5.5 V dc maximum Input high voltage (VIH). . . . . . . . . . . . . . . . 2.0 V dc to VCC Input low voltage (VIL) . . . . . . . . . . . . . . . . 0 V dc to 0.8 V dc Maximum input signal transition time (tIN). . . . . . . 250 ns Case operating temperature range (TC) . . . . . . . . . −55°C to +125°C

Fault coverage measurement of manufacturing Logic tests (MIL-STD-883, test method 5012) . . . . . . . . 4/ percent

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

April 4, 2014
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
October 4, 1996
MICROCIRCUIT, MEMORY, DIGITAL CMOS, PROGRAMMABLE LOGIC CELL ARRAY, MONOLITHIC SILICON
This drawing forms a part of a one part –one part number documentation system. Two product assurance classes consisting of military high reliability (device classes Q and M) and space application...
June 16, 1995
MICROCIRCUIT, MEMORY, DIGITAL CMOS, PROGRAMMABLE LOGIC CELL ARRAY, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-94712
October 18, 1994
MICROCIRCUIT, MEMORY, DIGITAL CMOS, PROGRAMMABLE LOGIC CELL ARRAY, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...

References

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