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DLA - DSCC-VID-V62/07618 REV A

MICROCIRCUIT, LINEAR, WIDE INPUT RANGE NONSYNCHRONOUS VOLTAGE MODE CONTROLLER, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 12 November 2014
Status: inactive
Page Count: 9
scope:

This drawing documents the general requirements of a high performance wide input range nonsynchronous voltage mode controller microcircuit, with an extended operating temperature range of -55ºC to +125ºC.

Document History

DSCC-VID-V62/07618 REV B
December 18, 2019
MICROCIRCUIT, LINEAR, WIDE INPUT RANGE NONSYNCHRONOUS VOLTAGE MODE CONTROLLER, MONOLITHIC SILICON
Scope. This drawing documents the general requirements of a high performance wide input range nonsynchronous voltage mode controller microcircuit, with an extended operating temperature range of...
DSCC-VID-V62/07618 REV A
November 12, 2014
MICROCIRCUIT, LINEAR, WIDE INPUT RANGE NONSYNCHRONOUS VOLTAGE MODE CONTROLLER, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance wide input range nonsynchronous voltage mode controller microcircuit, with an extended operating temperature range of -55ºC to...
DSCC-VID-V62/07618
March 12, 2007
MICROCIRCUIT, LINEAR, WIDE INPUT RANGE NONSYNCHRONOUS VOLTAGE MODE CONTROLLER, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance wide input range nonsynchronous voltage mode controller microcircuit, with an extended operating temperature range of -55°C to...

References

This document references:
JEP95 BOOK 1 - Book One Registered and Standard Outlines for Solid State and Related Products
Published by JEDEC on March 1, 1997
PREFACE This Publication contains those solid state product outlines and other associated drawings that have been registered and assigned a JEDEC designation and are printed on white paper. Product...
This document references:
JEDEC JESD 51-3 - Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
Published by JEDEC on August 1, 1996
This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements,...
This document references:
JEDEC JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
Published by JEDEC on February 1, 1999
This fixturing further defines the environment for thermal test of packaged microelectronic devices. Its function is to provide an alternate mounting surface for the analysis of heat flow in...
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