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DLA - DSCC-VID-V62/04712 REV E

MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON

active, Most Current
Organization: DLA
Publication Date: 18 January 2023
Status: active
Page Count: 15
scope:

Scope.

This drawing documents the general requirements of a high performance 3.3-V ABT 16-bit transparent D-type latch with 3-state outputs microcircuit, with an operating temperature range of -40°C to +85°C for device type 01 and extended operating temperature range of -55°C to +125°C for device type 02.

Document History

DSCC-VID-V62/04712 REV E
January 18, 2023
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
Scope. This drawing documents the general requirements of a high performance 3.3-V ABT 16-bit transparent D-type latch with 3-state outputs microcircuit, with an operating temperature range of -40°C...
DSCC-VID-V62/04712 REV D
July 12, 2016
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance 3.3-V ABT 16-bit transparent D-type latch with 3-state outputs microcircuit, with an operating temperature range of -40°C to...
DSCC-VID-V62/04712 REV C
June 14, 2011
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance 3.3-V ABT 16-bit transparent D-type latch with 3-state outputs microcircuit, with an operating temperature range of -40°C to...
DSCC-VID-V62/04712 REV B
December 2, 2005
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance Floating-Point Digital Signal Processor microcircuit, with an operating temperature range of -40 °C to +105 °C.
DSCC-VID-V62/04712 REV A
August 24, 2004
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
A description is not available for this item.
DSCC-VID-V62/04712
April 23, 2004
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, MONOLITHIC SILICON
A description is not available for this item.
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References

This document references:
JEP157A - Recommended ESD-CDM Target Levels
Published by JEDEC on April 1, 2022
The intent of this report is to document and provide critical information to assess and make decisions on safe CDM ESD level requirements. The scope of this document is to provide this information to...
This document references:
JEP95 JEDEC STD NO. 95-1 - JEDEC Standard No. 95-1 Section 4 Design Guidelines
Published by JEDEC on March 1, 1997
INTRODUCTION History JEDEC REGISTERED AND STANDARD OUTLINES FOR SEMICONDUCTOR DEVICES, JEDEC PUBLICATION 95, is the official JEDEC Publication that contains the registered or standard mechanical...
This document references:
JEDEC JESD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
Published by JEDEC on February 1, 1999
This fixturing further defines the environment for thermal test of packaged microelectronic devices. Its function is to provide an alternate mounting surface for the analysis of heat flow in...
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