NPFC - MIL-M-38510/757
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, BUFFER GATES, MONOLITHIC SILICON, POSITIVE LOGIC
| Organization: | NPFC |
| Publication Date: | 29 June 1992 |
| Status: | inactive |
| Page Count: | 25 |
scope:
This specification covers the detail requirements for monolithic silicon, advanced, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance (RHA) are provided and are reflected in the complete Part or Identifying Number (PIN). The PIN shall be formulated in accordance with MIL-M-38510.
The device types shall be as follows:
Device type Circuit 01 Hex inverter 02 Hex inverter schmitt trigger 03 Octal buffer/line driver with three-state outputs 04 Octal buffer/line driver with three-state outputs 05 Octal buffer/line driver with three-state outputs 06 To be included after dating 07 To be included after dating 08 To be included after dating 09 To be included after dating 10 Octal inverting bus driver with three-state outputs 11 Octal noninverting bus driver with three-state outputs
The device class shall be the product assurance level as defined in MIL-M-38510.
The case outlines shall be designated as follows:
Outline letter Case outline (see MIL-M-38510, appendix C) C D-1 (14-lead, .785" × .310" × .200"), dual-in-line package D F-2 (14-lead, .390" × .260" × .085"), flat package R D-8 (20-lead, 1.060" × .310" × .200"), dual-in-line package S F-9 (20-lead, .540" × .300" × .100"), flat package) 2 C-2 (20 terminal, .358" × .358" × .100"), square chip carrier package
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Laboratory (RL/ERDS), Griffiss AFB, NY 13441-5700, by using the Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.
Supply voltage range (VCC) - - - - - - - - - - −0.5 V dc to +6.0 V dc DC input voltage range (VIN) - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) - - - - - - - - −0.5 V dc to VCC + 0.5 V dc Clamp diode current (IIK, IOK) - - - - - - - - ±20 mA DC output current (IOUT) - - - - - - - - - - ±50 mA DC VCC or GND current (ICC, IGND)- - - - - - - ±100 mA Storage temperature range (TSTG)- - - - - - - - ±65°C to +150°C Maximum power dissipation (PD) - - - - - - - - - 500 mW Lead temperature (soldering, 10 seconds) - - - - +300°C Thermal resistance, junction-to-case (θJC) - - - See MIL-M-38510, appendix C Junction temperature (TJ) - - - - - - - - - - +175°C Case operating temperature (TC) - - - - - - - - −55°C to +125°C
Supply voltage range (VCC) - - - - - - - - - +3.0 V dc to +5.5 V dc Input voltage range (VIN) - - - - - - - - - +0.0 V dc to VCC Output voltage range (VOUT) - - - - - - - - +0.0 V dc to VCC Case operating temperature range (TC) - - - −55°C to +125°C Input low (VIL) maximum voltage - - - - - - 0.90 V dc at VCC = 3.0 V dc 1.35 V dc at VCC = 4.5 V dc 1.65 V dc at VCC = 5.5 V dc Input high (VIH) minimum voltage - - - - - 2.10 V dc at VCC = 3.0 V dc 3.15 V dc at VCC = 4.5 V dc 3.85 V dc at VCC = 5.5 V dc Input rise and fall rate (tr, tf) maximum: VCC = 3.6 V, VCC = 5.5 V - - - - - - - - 8 ns/V
intended Use:
Microcircuits conforming to this specification are intended for original equipment design application and logistic support of existing equipment.
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