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IEC 60191-6-17

Mechanical standardization of semiconductor devices – Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages – Design guide for stacked packages – Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)

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Organization: IEC
Publication Date: 1 January 2011
Status: active
Page Count: 58
ICS Code (Semiconductor devices in general): 31.080.01
scope:

This part of IEC 60191 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.

Document History

IEC 60191-6-17
January 1, 2011
Mechanical standardization of semiconductor devices – Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages – Design guide for stacked packages – Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
This part of IEC 60191 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.

References

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