DLA - DSCC-DWG-V62/16610 REV B
MICROCIRCUIT, LINEAR, SINK AND SOURCE DDR TERMINATION REGULATOR, MONOLITHIC SILICON
active, Most Current
Organization: | DLA |
Publication Date: | 4 May 2022 |
Status: | active |
Page Count: | 13 |
scope:
Scope.
This drawing documents the general requirements of a high performance sink and source double data rate (DDR) termination regulator microcircuit, with an operating temperature range of -55°C to +125°C.
Document History
DSCC-DWG-V62/16610 REV B
May 4, 2022
MICROCIRCUIT, LINEAR, SINK AND SOURCE DDR TERMINATION REGULATOR, MONOLITHIC SILICON
Scope.
This drawing documents the general requirements of a high performance sink and source double data rate (DDR) termination regulator microcircuit, with an operating temperature range of -55°C...
December 6, 2016
MICROCIRCUIT, LINEAR, SINK AND SOURCE DDR TERMINATION REGULATOR, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance sink and source double data rate (DDR) termination regulator microcircuit, with an operating temperature range of -55ºC to +125ºC.
July 14, 2016
MICROCIRCUIT, LINEAR, SINK AND SOURCE DDR TERMINATION REGULATOR, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance sink and source double data rate (DDR) termination regulator microcircuit, with an operating temperature range of -55°C to +125°C.