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DLA - SMD-5962-95595 REV B

MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT

inactive
Organization: DLA
Publication Date: 13 January 1997
Status: inactive
Page Count: 32
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with MIL-PRF-38534. Two product assurance classes, military high reliability (device class H) and space application (device class K) and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN.

The PIN shall be as shown in the Following example:

Device classes H and K RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 WS-128K32-120Q SRAM, 128K × 32-BIT 120 ns 02 WS-128K32-100Q SRAM, 128K × 32-BIT 100 ns 03 WS-128K32-85Q SRAM, 128K × 32-BIT 85 ns 04 WS-128K32-70Q SRAM, 128K × 32-BIT 70 ns 05 WS-128K32-55Q,ACT-S128K32N-055Q SRAM, 128K × 32-BIT 55 ns 06 WS-128K32-45Q,ACT-S128K32N-045Q SRAM, 128K × 32-BIT 45 ns 07 WS-128K32-35Q,ACT-S12BK32N-035Q SRAM, 128K × 32-BIT 35 ns 08 WS-128K32-25Q,ACT-S128K32N-025Q SRAM, 128K × 32-BIT 25 ns 09 WS-128K32-20Q,ACT-S128K32N-020Q SRAM, 128K × 32-BIT 20 ns 10 WS-128K32-17Q,ACT-S128K32N-017Q SRAM, 128K × 32-BIT 17 ns

This device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation H or K Certification and qualification to MIL-PRF-38534

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style M See figure 1 68 Ceramic, Quad Flatpack, dual cavity X See figure 1 68 Ceramic, Quad Flatpack Y See figure 1 68 Ceramic, Quad Flatpack, Low profile Z See figure 1 68 Ceramic, Quad Flatpack, dual cavity

The lead finish shall be as specified in MIL-PRF-38534 for classes H and K. Finish letter "X" shall not be marked on the microcircuit or ft packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) ........................... −0.5 V dc to +7.0 V dc Signal voltage range (any pin) ....................... −0.5 V dc to +7.0 V dc Power dissipation (PD): Device types 01 through 08 ......................... 2.75W max Device types 09 and 10 ............................. 3.30W max Thermal resistance junction-to-case (θJC): Case outlines X and Y .............................. 6.6°C/W Case outline M .................................... 10°C/W Case outline Z ..................................... 8°C/W Storage temperature .................................. −65°C to +150°C Lead temperature (soldering, 10 seconds) ............. +300°C

Supply voltage (VCC) ................................. +4.5 V dc to +5.5 V dc Input low voltage range (VIL) ........................ −0.3 V dc to +0.8 V dc Input high voltage range (VIH) ....................... +2.2 V dc to VCC +0.5 V dc Output low voltage, maximum (VOL) .................... +0.4 V dc Output high voltage, minimum (VOH).................... +2.4 V dc Case operating temperature range (TC) ................ −55°C to +125°C

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Document History

January 25, 2024
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes are available and are reflected in the Part...
August 9, 2019
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the...
October 25, 2016
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K x 32-BIT
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
January 7, 2004
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
September 22, 2003
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
February 21, 2003
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
November 14, 2001
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
May 6, 2001
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
June 14, 2000
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
April 6, 2000
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
September 7, 1999
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowered high reliability), class H (high reliability), and class K, (highest...
September 28, 1998
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
July 24, 1998
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lower reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
September 10, 1997
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
SMD-5962-95595 REV B
January 13, 1997
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
August 7, 1996
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
A description is not available for this item.
July 19, 1995
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, STATIC RANDOM ACCESS MEMORY, CMOS, 128K X 32-BIT
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...

References

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