scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Input/output levels Chip enable 2/ Access time 01 32K × 8 CMOS SRAM CMOS Dual 60 ns 02 32K × 8 CMOS SRAM TTL Dual 60 ns 03 32K × 8 CMOS SRAM CMOS Dual 40 ns 04 32K × 8 CMOS SRAM TTL Dual 40 ns 05 32K × 8 CMOS SRAM CMOS Dual 60 ns 06 32K × 8 CMOS SRAM TTL Dual 60 ns 07 32K × 8 CMOS SRAM CMOS Dual 40 ns 08 32K × 8 CMOS SRAM TTL Dual 40 ns 09 32K × 8 CMOS SRAM CMOS Single 55 ns 10 32K × 8 CMOS SRAM TTL Single 55 ns 11 32K × 8 CMOS SRAM CMOS Dual 55 ns 12 32K × 8 CMOS SRAM TTL Dual 55 ns 13 32K × 8 CMOS SRAM CMOS Dual 30 ns 14 32K × 8 CMOS SRAM TTL Dual 30 ns 15 32K × 8 CMOS SRAM CMOS Single 70 ns 16 32K × 8 CMOS SRAM TTL Single 70 ns 17 32K × 8 CMOS SRAM CMOS Dual 70 ns 18 32K × 8 CMOS SRAM TTL Dual 70 ns 19 32K × 8 CMOS SRAM CMOS Dual 35 ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outlines shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 36 Flat pack Y See figure 1 40 Flat pack Z See figure 1 36 Flat pack U See figure 1 36 Flat pack T See figure 1 36 Flat pack M GDIP1-T28 or CDIP2-T28 28 Dual-in-line N See figure 1 36 Flat pack 9 See figure 1 28 Flat pack 4 See figure 1 36 Flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (V_CC) -------------------------------- −0.5 V dc to +7.0 V dc DC input voltage range (V_IN) ------------------------------ −0.5 V dc to V_CC + 0.3 V dc DC output voltage range V_OUT ------------------------------ −5 V dc to V_CC + 0.3 V dc Storage temperature range --------------------------------- −65° C to +150°C Lead temperature (soldering, 5 seconds) ------------------- +250° C Thermal resistance, junction-to-case (Θ_JC): Cases X and Y ------------------------------------------- 3.3°C/watt Cases Z, U, and 4 --------------------------------------- 2.2°C/watt. Case T -------------------------------------------------- 10°C/watt Case M -------------------------------------------------- See MIL-STD-1835 Case N -------------------------------------------------- 2.1°C/watt Case 9 -------------------------------------------------- 1.8°C/watt Output voltage applied to high Z state -------------------- −0.3 V dc to V_CC +0.3 V dc Maximum power dissipation (P_D) ---------------------------- 2 watts Maximum junction temperature (T_J) ------------------------- +150° C 5/

Supply voltage range (V_CC) --------------------------------- 4.5 V dc (min) to 5.5 V dc (max) Supply voltage (V_SS) --------------------------------------- 0.0 V dc High level input voltage range (V_IH): Device types 01,03,09,11,13,15,17 (CMOS levels) ---------- 3.5 V dc to V_CC + 0.3 V dc Device types 05,07,19 (CMOS levels) ---------------------- 0.7 × V_CC to V_CC + 0.3 V dc Device types 02,04,06,08,10,12,14,16,18 (TTL levels) ----- 2.2 V dc to V_CC + 0.3 V dc Low level input voltage range (V_IL): Device types 01,03,09,11,13,15,17 (CMOS levels) ---------- −0.3 V dc to 1.5 V dc Device types 05,07,19 (CMOS levels) ---------------------- −0.3 V dc to 0.3 × V_CC Device types 02,04,06,08,10,12,14,16,18 (TTL levels) ----- −0.3 V dc to 0.8 V dc Case operating temperature range (T_C) ---------------------- −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ---------------- 100 percent

intended Use: