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DLA - SMD-5962-94754 REV C

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 7 January 1998
Status: inactive
Page Count: 22
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device classes M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number 1/ Circuit function tPD Buffer type 01,05 22VP10 22-input 10 output 25 ns CMOS AND-OR-Logic array 02 22VP10 22-input 10 output 25 ns TTL AND-OR-Logic array 03,06 22VP10 22-input 10 output 20 ns CMOS AND-OR-Logic array 04 22VP10 22-input 10 output 20 ns TTL AND-OR-Logic array

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CDFP4-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package Y CQCC2-F28A 24 Unformed lead chip carrier package

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range .................................. −0.3 V dc to +7.0 V dc Input voltage range ................................... −0.3 V dc to +7.0 V dc 3/ Output voltage applied ................................ −0.5 V dc to +7.0 V dc 3/ Output sink current ................................... 12 mA Thermal resistance, junction-to-case(θJC).............. See MIL-STD-1835 Maximum power dissipation (PD) 4/ ..................... 1.6 W Maximum junction temperature .......................... +175°C Lead temperature (soldering, 10 seconds maximum) ...... +300°C Data retention ........................................ 10 years (minimum)

Supply voltage range (VDD) ............................ 4.5 V dc to 5.5 V dc 5/ High level input voltage (VIH) TTL .................... 2.2 V dc minimum Low level input voltage (VIL) TTL ..................... 0.8 V dc maximum High level input voltage (VIH) CMOS.................... 0.7 × VDD Low level input voltage (VIL) CMOS .................... 0.3 × VDD Case operating temperature range (TC).................. −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) .......... percent 6/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

October 24, 2017
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD-HARD), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
November 30, 2009
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
September 9, 2004
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
A description is not available for this item.
February 12, 1999
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. Microcircuits covered by...
SMD-5962-94754 REV C
January 7, 1998
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
April 29, 1996
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...
September 29, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
A description is not available for this item.
June 6, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...

References

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