DLA - SMD-5962-94754
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD HARD), MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 6 June 1995 |
| Status: | inactive |
| Page Count: | 19 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function tPD Buffer type 01 22VP10 22-input 10-output 25 ns CMOS AND-OR-logic array 02 22VP10 22-input 10-output 25 ns TTL AND-OR-logic array
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package 3 CQCC1-N28 28 Square chip carrier package
The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range . . . . . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc Input voltage range . . . . . . . . . . . . . . . . . . −0.3 V dc to +7.0 V dc 3/ Output voltage applied . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc 3/ Output sink current . . . . . . . . . . . . . . . . . . 12 mA Thermal resistance, junction-to-case (θJC) . . . . . . . See MIL-STD-1835 Maximum power dissipation (PD) 4/ . . . . . . . . . . . 1.6 W Maximum junction temperature . . . . . . . . . . . . . . +175°C Lead temperature (soldering, 10 seconds maximum) . . . . +300°C Data retention . . . . . . . . . . . . . . . . . . . . . 10 years (minimum)
Supply voltage range (VDD) . . . . . . . . . . . . . . . 4.5 V dc to 5.5 V dc High level input voltage (VIH) TTL . . . . . . . . . . . 2.2 V dc minimum Low level input voltage (VIL) TTL . . . . . . . . . . . 0.8 V dc maximum High level input voltage (VIH) CMOS . . . . . . . . . . 0.7 × VDD Low level input voltage (VIL) CMOS . . . . . . . . . . 0.3 × VDD Case operating temperature range (TC) . . . . . . . . . −55°C to +l25°C
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . . . . . . . . percent 5/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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