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DLA - SMD-5962-91508 REV A

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 10 October 1996
Status: inactive
Page Count: 31
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Data retention Access time 01 7006 16k × 8 Dual Port Static RAM No 70ns 02 7006 16k × 8 Dual Port Static RAM Yes 70ns 03 7006 16k × 8 Dual Port Static RAM No 55ns 04 7006 16k × 8 Dual Port Static RAM Yes 55ns 05 7006 16k × 8 Dual Port Static RAM No 45ns 06 7006 16k × 8 Dual Port Static RAM Yes 45ns 07 7006 16k × 8 Dual Port Static RAM No 35ns 08 7006 16k × 8 Dual Port Static RAM Yes 35ns

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X CMGA3-PN 68 pin grid array Y See figure 1 68 flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage range (VCC)---------------- ------ −0.5 V dc to +7.0 V dc Storage temperature range----------------- ------ −65°C to +150°C DC output current---------------------- --------- 50 mA Maximum power dissipation (PD)------------- ----- 2.2 W Lead temperature (soldering, 10 seconds)---- ---- 260°C Thermal resistance, junction-to-case (ΘJC): Case X---------------------------- ------------- See MIL-STD-1835 Case Y---------------------------- ------------- 20°C/W Maximum junction temperature (TJ)---------- ----- +150°C 3/ DC input voltage range--------------------------- −0.5 V dc to VCC + 0.5 V dc 4/ DC output voltage range----------------- -------- −0.5 V dc to VCC + 0.5 V dc 4/ Output voltage applied in high Z state---- ------ −0.5 V dc to VCC + 0.5 V dc

Supply voltage (VCC) ---------------------------- +4.5 V dc to +5.5 V dc High level input voltage (VIH) ------------------ +2.2 V dc to +6.0 V dc Low level input voltage (VIL) 2/ ---------------- −0.5 V dc to +0.8 V dc Case operating temperature range (TC) ----------- −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)------ 5/ percent

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

May 15, 2018
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
July 25, 2013
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
January 31, 2007
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
January 17, 1997
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-91508 REV A
October 10, 1996
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
April 15, 1993
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 8 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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