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NPFC - MIL-M-38510/756

MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC

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Organization: NPFC
Publication Date: 16 August 1990
Status: inactive
Page Count: 29
scope:

This specification covers the detail requirements for monolithic silicon, advanced, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance (RHA) are provided and are reflected in the complete Part or Identifying Number (PIN).

The device types shall be as follows:

Device type Circuit 01 Octal D-type flip-flop with clear 02 Octal D-type flip-flop with three state outputs 03 Octal D-type flip-flop with clock enable 04 Octal D-type flip-flop with three state outputs 05 Octal D-type flip-flop with inverting three-state outputs 06 Octal D-type flip-flop with inverting three-state outputs

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outlines shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) R D-8 (20-lead, 1.060" × .310" × .200"), dual-in-line package S F-9 (20-lead, .540" × .300" × .100"), flat package 2 C-2 (20 terminal, .358" × .358" × .100"), square chip carrier package

Supply voltage range (VCC) - - - - - - - - - - - - - −0.5 V dc to +6.0 V dc DC input voltage range (VIN) - - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc DC output Voltage range (VOUT) - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc Clamp diode current (IIK,IOK)- - - - - - - - - - - - DC output current (IOUT) - - - - - - - - - - - - - - DC VCC or GND current (ICC,IGND) - - - - - - - - - - Storage temperature range (TSTG) - - - - - - - - - - −65½C to +150½C Maximum power dissipation (PD) - - - - - - - - - - - +300 mW Lead temperature (soldering, 10 seconds) - - - - - - +300½C Thermal resistance, junction-to-case, (ÕJC)- - - - - See MIL-M-38510, appendix C Junction temperature (TJ)- - - - - - - - - - - - - - +175½C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RADC/RBE-2), Griffiss AFB, NY 13441-5700, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by or by letter

Supply voltage range (VCC) - - - - - - - - - - - - 3.0 V dc to 5.5 V dc Output voltage range - - - - - - - - - - - - - - - 0.0 V dc to VCC Case operating temperature range (TC) - - - - - - −55°C to +125°C Maximum low level input voltage, (VIL) - - - - - - 0.90 V at VCC = 3.0 V 1.35 V at VCC = 4.5 V 1.65 V at VCC = 5.5 V Minimum high level input voltage, (VIH)- - - - - - 2.10 V at VCC = 3.0 V 3.15 V at VCC = 4.5 V 3.85 V at VCC = 5.5 V Input rise and fall rate (tr, tf) maximum: VCC = 3.6 V, VCC = 5.5 V - - - - - - - - - - - - 8 ns/V Minimum setup time, Dn to CP (ts1): Device type.: 01 02 03 04 05 and 06 Unit VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 6.5 5.5 6.5 4.5 2.0 ns TC = +125°C - - - - - - - - - - 8.0 6.5 7.5 4.5 2.0 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 4.0 4.0 5.0 3.5 1.0 ns TC = +125°C - - - - - - - - - - 5.0 5.0 6.0 3.5 1.0 ns Minimum hold time, Dn to CP (th1): Device type : 01 02 03 04 05 and 06 Unit VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 0.0 1.0 1.0 2.5 0.0 ns TC = +125°C - - - - - - - - - 0.0 1.0 1.5 2.5 0.0 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 1.0 1.5 2.0 2.5 0.5 ns TC = +125°C - - - - - - - - - 1.0 1.5 2.5 2.5 0.5 ns Minimum clock pulse width (tw1): Device type: 01, 02, and 03 04 05 and 06 Unit VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 5.5 6.0 3.5 ns TC = +125°C - - - - - - - - - 6.5 7.5 3.5 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 5.0 5.0 2.5 ns TC = +125°C - - - - - - - - - 5.0 5.5 2.5 ns Minimum [M bar][R bar] pulse width (tw2): Device type: 01 VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 8.0 ns TC = +125°C - - - - - - - - - 10.0 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 5.0 ns TC = +125°C - - - - - - - - 6.5 ns Minimum recovery time (trec): Device type: 01 VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 5.0 ns TC = +125°C - - - - - - - - - 6.0 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 3.5 ns TC = +125°C - - - - - - - - 4.0 ns Minimum setup time, [O bar][E bar] to CP (ts2): Device type: 01 VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 7.0 ns TC = +125°C - - - - - - - - - 9.5 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 5.0 ns TC = +125°C - - - - - - - - 6.0 ns Minimum hold time, [O bar][E bar] to CP (th2): Device type: 01 VCC = 3.0 V dc; TC = +25°C, −55°C - - - - - - - 0.0 ns TC = +125°C - - - - - - - - - 1.0 ns VCC = 4.5 V dc; TC = +25°C, −55°C - - - - - - - 1.0 ns TC = +125°C - - - - - - - - 2.0 ns

intended Use:

Microcircuits conforming to this specification are intended for original equipment design application and logistic support of existing equipment.

Document History

August 21, 2019
Microcircuits, Digital, Advanced CMOS, Flip-Flops, Monolithic Silicon, Positive Logic
A description is not available for this item.
September 30, 2014
Microcircuits, Digital, Advanced CMOS, Flip-Flops, Monolithic Silicon, Positive Logic
A description is not available for this item.
December 16, 2009
Microcircuits, Digital, Advanced CMOS, Flip-Flops, Monolithic Silicon, Positive Logic
This specification covers the detail requirements for monolithic silicon, advanced CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation...
March 4, 2005
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
This specification covers the detail requirements for monolithic silicon, advanced CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation...
February 1, 2002
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
A description is not available for this item.
April 28, 1999
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
A description is not available for this item.
November 24, 1997
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
A description is not available for this item.
August 9, 1996
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
A description is not available for this item.
November 7, 1994
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
This specification covers the detail requirements for monolithic silicon, advanced CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and radiation...
April 15, 1992
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
A description is not available for this item.
MIL-M-38510/756
August 16, 1990
MICROCIRCUITS, DIGITAL, ADVANCED CMOS, FLIP-FLOPS, MONOLITHIC SILICON, POSITIVE LOGIC
This specification covers the detail requirements for monolithic silicon, advanced, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines, lead finishes, and...

References

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