DLA - SMD-5962-96655
MICROCIRCUIT, DIGITAL, RADIATION HARDENED, CMOS, AND GATE, MONOLITHIC SILICON
Organization: | DLA |
Publication Date: | 7 November 1995 |
Status: | inactive |
Page Count: | 16 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function 01 4073B Radiation hardened CMOS triple 3-input AND gate 02 4081B Radiation hardened CMOS quad 2-input AND gate 03 4082B Radiation hardened CMOS dual 4-input AND gate 04 4073BN Radiation hardened CMOS triple 3-input AND gate with neutron irradiated die 05 4081BN Radiation hardened CMOS quad 2-input AND gate with neutron irradiated die 06 4082BN Radiation hardened CMOS dual 4-input AND gate with neutron irradiated die
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style C CDIP2-T14 14 Dual-in-line package X CDFP3-F14 14 Flat package
The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range (VDD) . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +20 V dc Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to VDD + 0.5 Vdc DC input current, any one input . . . . . . . . . . . . . . . . . . . ±10 mA Device dissipation per output transistor . . . . . . . . . . . . . . 100 mW Storage temperature range (TSTG) . . . . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . +265°C Thermal resistance, junction-to-case (ΘJC): Case C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24°C/W Case X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30°C/W Thermal resistance, junction-to-ambient (ΘJA): Case C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C/W Case X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116°C/W Junction temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . +175°C Maximum power dissipation at TA = +125°C (PD): 4/ Case C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68 W Case X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.43 W
Supply voltage range (VDD) . . . . . . . . . . . . . . . . . . . . . 3.0 V dc to +18 V dc Case operating temperature range (TC) . . . . . . . . . . . . . . . . −55°C to +125°C Input voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VDD Output voltage (VOUT) . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VDD Radiation features: Total dose . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 × 105 Rads (Si) Single event phenomenon (SEP) effective linear energy threshold, no upsets or latchup (see 4.4.4.5) . . >75 MEV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . . . . . . . . . . . . . . . . . . > 5 × 108 Rads(Si)/s 5/ Dose rate Latch-up . . . . . . . . . . . . . . . . . . . . . . . > 2 × 108 Rads(Si)/s 5/ Dose rate survivability . . . . . . . . . . . . . . . . . . . . . > 5 × 1011 Rads(Si)/s 5/ Neutron irradiated (device types 04, 05, and 06) . . . . . . . . . > 1 × 1014 neutrons/cm2
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
Microcircuits... View More