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DLA - SMD-5962-94611 REV D

MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS

inactive
Organization: DLA
Publication Date: 14 April 1998
Status: inactive
Page Count: 35
scope:

The drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with MIL-PRF-38534. Two product assurance classes, military high reliability (device class H) and space application (device class K) and a choice of case outlines and lead finishes are available and are reflected in the Part or identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes H and K RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 WS512K32-120Q 512K × 32-BIT SRAM 120 ns 02 WS512K32-100Q 512K × 32-BIT SRAM 100 ns 03 WS512K32-85Q 512K × 32-BIT SRAM 85 ns 04 WS512K32-70Q 512K × 32-BIT SRAM 70 ns 05 ACT-S512K32N-055Q,WS512K32-55Q 512K × 32-BIT SRAM 55 ns 06 ACT-S512K32N-045Q,WS512K32-45Q 512K × 32-BIT SRAM 45 ns 07 ACT-S512K32N-035Q,WS512K32-35Q 512K × 32-BIT SRAM 35 ns 08 ACT-S512K32N-025Q,WS512K32-25Q 512K × 32-BIT SRAM 25 ns 09 ACT-S512K32N-020Q,WS512K32-20Q 512K × 32-BIT SRAM 20 ns 10 ACT-S512K32N-017Q,WS512K32-17Q 512K × 32-BIT SRAM 17 ns

This device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation H or K Certification and qualification to MIL-PRF-38534

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style M See figure 1 68 Ceramic, quad flatpack, dual cavity X See figure 1 66 Hex-in-line, single cavity, with standoffs Y See figure 1 68 Ceramic, quad flatpack, single cavity T See figure 1 66 Hex-in-line, single cavity, with standoffs U See figure 1 66 Hex-in-line, single cavity, with standoffs

The lead finish shall be as specified in MIL-PRF-38534.

Supply voltage range (VCC) ......................... −0.5 V dc to +7.0 V dc Signal voltage range (Vg) .......................... −0.5 V dc to VCC +0.5 V dc Power dissipation (PD): Device types 01-04 ........................................ 2.2 W Device types 05 and 06 .................................... 3.2 W Device types 07 and 08 .................................... 3.6 W Device types 09 and 10 .................................... 4.4 W Storage temperature range ................................. −65°C to + 150°C Lead temperature (soldering, 10 seconds) .................. +300°C Junction temperature (Tj) .......................... +150°C

Supply voltage range (VCC) .......................... +4.5 V dc to +5.5 V dc Input low voltage range (VIL) ....................... −0.3 V dc to +0.8 V dc Input high voltage range (VIH) ...................... +2.2 V dc to VCC +0.3 V dc Output low voltage, maximum (VOL) ................... +0.4 v dc Output high voltage, minimum (VOH) .................. +2.4 v dc Ambient operating temperature range (TA) ............ −55°C to +125°C

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Document History

July 19, 2023
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K x 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes are available and are reflected in the Part...
October 25, 2016
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K x 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
September 12, 2012
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K x 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
May 3, 2004
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or...
December 19, 2003
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
February 24, 2003
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
November 18, 2002
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
December 21, 2001
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
May 16, 2001
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
June 19, 2000
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
April 6, 2000
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
August 18, 1999
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
April 22, 1999
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
September 1, 1998
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G (lowest high reliability), class H (high reliability), and class K, (highest...
SMD-5962-94611 REV D
April 14, 1998
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
The drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
February 13, 1998
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...
September 27, 1996
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
July 3, 1996
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
A description is not available for this item.
November 13, 1995
MICROCIRCUIT, HYBRID, MEMORY, DIGITAL, 512K X 32-BIT, STATIC RANDOM ACCESS MEMORY, CMOS
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). This drawing describes device requirements for hybrid microcircuits to be processed in accordance with...

References

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