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DLA - SMD-5962-96890

MICROCIRCUITS, DIGITAL, LOW VOLTAGE CMOS, 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 13 June 1997
Status: inactive
Page Count: 26
scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following example:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) identify the circuit function as follows:

Device type Generic number Circuit function 01 54GTL16612 18 Bit GTL/LVT Universal Bus Transceivers

The device class designator is a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X GDFP1-F56 or CDFP2-F56 56 Flat pack

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Supply voltage ranges (VCC): 3.3 V supply ............................................................................. −0.5 V dc to +4.6 V dc 5.0 V supply ............................................................................. −0.5 V do to +7.0 V dc DC input voltage range (VIN): A port ................................................................................... −0.5 V dc to +7.0 V dc 4/ B port ................................................................................... −0.5 V dc to +4.6 V dc 4/ DC output voltage range in the high or power-off state (VOUT): A port ................................................................................... −0.5 V dc to 7.0 V dc 4/ B port ................................................................................... −0.5 V dc to +4.6 V dc 4/ Current into any output in the low state (IO): A port ................................................................................... +128 mA B port ................................................................................... +80 mA Current into any A-port output in the high state (IO) ..................................... +64 mA 5/ DC input clamp current (IIK) (VIN < 0.0) .................................................. −50 mA DC output clamp current (IOK) (VOUT < 0.0) ................................................ −50 mA Maximum power dissipation at TA = +55°C (in still air) (PD) ............................... 1.0 W 6/ Storage temperature range (TSTG) .......................................................... −65°C to +150°C Lead temperature (soldering, 10 seconds) .................................................. +300°C Thermal resistance, junction-to-case (ΘJC) ................................................ See MIL-STD-1835 Junction temperature (TJ) ................................................................. +150°C

Supply voltage range (VOC): 3.3 V supply ............................................................................. +3.15 V dc to +3.45 V dc 5.0 V supply ............................................................................. +4.75 V dc to +5.25 V dc Supply voltage reference (VREF) ........................................................... 0.8 V dc Maximum input voltage (VIN): B port ................................................................................... VCC (3.3 V) except B port ............................................................................ 5.5 V Minimum high level input voltage (VIH): B port ................................................................................... VREF+50 mV except B port ............................................................................ +2.0 V Maximum low level input voltage (VIL): B port ................................................................................... VREF−50 mV except B port ............................................................................ +0.8 V Input clamp current (IIK) ................................................................. −18mA Maximum high level output current (IOH): A port ........................................... −32 mA Maximum low level output current (IOL): A port ................................................................................... +64 mA B port ................................................................................... +40 mA Case operating temperature range (TC) ..................................................... −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)............................................. XX percent 8/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

September 21, 2016
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are...
July 27, 2010
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
February 4, 2003
MICROCIRCUITS, DIGITAL, LOW VOLTAGE CMOS, 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-96890
June 13, 1997
MICROCIRCUITS, DIGITAL, LOW VOLTAGE CMOS, 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...

References

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