DOD - SMD 5962-92316
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
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| Organization: | DOD |
| Publication Date: | 20 March 2015 |
| Status: | active |
| Page Count: | 28 |
scope:
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
Document History
May 7, 2021
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
Replaceability....
SMD 5962-92316
March 20, 2015
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
May 31, 2006
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
October 25, 1999
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
Microcircuits covered by...
July 20, 1998
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
DD Form 1695, APR 92
Previous editions are obsolete.
June 5, 1996
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
February 17, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1MEG X 1 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON
A description is not available for this item.