DOD - SMD 5962-90594
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O and TRANSPARENT WRITE, MONOLITHIC SILICON
inactive
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| Organization: | DOD |
| Publication Date: | 7 November 2008 |
| Status: | inactive |
| Page Count: | 18 |
scope:
This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
Document History
October 10, 2023
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O and TRANSPARENT WRITE, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
July 13, 2016
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O and TRANSPARENT WRITE, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
SMD 5962-90594
November 7, 2008
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O and TRANSPARENT WRITE, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
August 25, 1995
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O AND TRANSPARENT WRITE, MONOLITHIC SILICON
A description is not available for this item.
December 4, 1992
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 SRAM WITH SEPARATE I/O AND TRANSPARENT WRITE, MONOLITHIC SILICON
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices"....