DLA - SMD-5962-95627 REV B
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 23 June 1997 |
| Status: | inactive |
| Page Count: | 23 |
scope:
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment (device class N). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class N, the user is cautioned to assure that the device is appropriate for the application environment.
The PIN shall be as shown in the following example:
Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function 01 ACT7881 1024 × 18 clocked FIFO
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 N Certification and qualification to MIL-PRF-38535 with a non-traditional performance environment 1/ Q or V Certification and qualification to MIL-PRF-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style Document X MS-026 BDD 80 Plastic quad flat package JEP 95 Y See figure 1 68 Ceramic quad flat package ---
The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix A for device class M.
Lead finish D shall be designated by a single letter as follows:
Finish letter Process D Palladium
Supply voltage range (VCC) ....................
Supply voltage range (VCC) ....................
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) .... XX percent 5/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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