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DLA - SMD-5962-95627 REV A

MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 14 February 1996
Status: inactive
Page Count: 22
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Three product assurance classes consisting of space application (device class V), military high reliability (device classes Q and M) and non-traditional military (device class N) with a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". For device class N, the user is cautioned to assure that the device is appropriate for the application environment. When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes N, Q, and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 ACT7881 1024 × 18 clocked FIFO

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 N Certification and qualification to MIL-PRF-38535 with a non-traditional performance environment 1/ Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style Document X MS-026 BDD 80 Plastic quad flat package JEP 95

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-PRF-38535 for classes N, Q, and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference. For device class N, lead finish shall be in accordance with 1.2.5.1 herein.

Lead finish D shall be designated by a single letter as follows:

Finish letter Process D Palladium

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc DC input voltage (VIN) . . . . . . . . . . . . . . . . . . . . . 7.0 V dc Voltage applied to a disabled 3-state output . . . . . . . . . . 5.5 V dc Operating free-air temperature range (TA) . . . . . . . . . . . −55°C to +125°C Storage temperature range (TSTG) . . . . . . . . . . . . . . . . −65°C to +150°C

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Maximum low level input voltage (VIL) . . . . . . . . . . . . . +0.8 V Minimum high level input voltage (VIH) . . . . . . . . . . . . . +2.0 V Maximum high level output current (IOH) . . . . . . . . . . . . −8.0 mA Maximum low level output current (IOL) . . . . . . . . . . . . . +16.0 mA Case operating temperature range (TC) . . . . . . . . . . . . . −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . . . . . . . . . XX percent 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

December 14, 2017
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device class Q), and nontraditional performance environment (device...
April 5, 2011
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability, (device classes M and Q), and nontraditional performance environment...
April 4, 2005
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability, (device classes M and Q), and nontraditional performance environment...
November 18, 1997
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
A description is not available for this item.
June 23, 1997
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and nontraditional performance environment...
SMD-5962-95627 REV A
February 14, 1996
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Three product assurance classes consisting of space application (device class V), military high...
November 9, 1995
MICROCIRCUIT, MEMORY, DIGITAL, 1024 X 18 CLOCKED FIFO, MONOLITHIC SILICON
A description is not available for this item.

References

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