scope:

This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN is as shown in the following examples.

For device class M:

For device classes Q and V:

Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time 01,12 64K × 8-bit UVEPROM 150 ns 02,13 64K × 8-bit UVEPROM 200 ns 03,14 64K × 8-bit UVEPROM 250 ns 04,11 64K × 8-bit UVEPROM 120 ns 05,10 64K × 8-bit UVEPROM 90 ns 06 64K × 8-bit UVEPROM 70 ns 07 64K × 8-bit UVEPROM 55 ns 08 64K × 8-bit UVEPROM 45 ns 09 64K × 8-bit UVEPROM 35 ns

The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device class M and Q designators will not be included in the PIN for device types 01 through 05, and will not be marked on the device.

Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line 2/ Y CQCC1-N32 32 Rectangular leadless chip carrier 2/ Z See figure 1 32 "J" lead chip carrier 2/

The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

Storage temperature range ............................... −65°C to + 150°C Input voltages with respect to ground ..................... −0.6 V dc to +6.25 V dc Output voltages with respect to ground .................... −0.6 V dc to V_CC +1.0 V dc Voltage on pin A9 with respect to ground .................. −0.6 V dc to +13.5 V dc V_PP supply voltage with respect to ground ................. −0.6 V dc to +14.0 V dc Power dissipation (P_D) 3/ ................................. 350 mW Lead temperature (soldering, 10 seconds) .................. +300°C Thermal resistance, junction-to-case (Θ_JC) ................ See MIL-STD-1835 Junction temperature (T_J) ................................ +150°C

Case operating temperature range (T_C) ..................... −55°C to + 125°C Supply voltage range (V_CC) ................................ +4.5 V dc to 5.5 V dc

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) ............................ XX percent 4/

intended Use: